Product List

Products

CMUL

COMPLEX MULTIPLIER

Brief Description

The complex multiplier adder multiplies two complex (16+16) x (16+16) bit words every 50 ns And

Can be configured to output the complete complex (32+32) bit result within a single clock cycle.

Each location is accessible in RAM mode and any location can be read or written into.

The data format is fractional two's complement.

The complex multiplier basically operates in two modes.

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Specifications
  • §TTL Compatible I/O
  • 4 cycle pipeline delay
  • Clock rate : 20MHz
  • Maximum frequency: 20 MHz
  • Die Size : 45.69 sq.mm
  • Gate Complexity: 7533
  • Package: 144 pin CPGA
  • MIL883C grade
  • Application : Data Processing

Contacts

Semiconductor Technology and Applied Research Centre
(A unit of SITAR -Govt. of INDIA)
PO Box No.1640, off Old Madras Road,
Doorvani Nagar P.O.,
Bangalore 560 016, India.


Phone: 91 80 25653588
Fax: 91 80 25653590
Email: mail@sitarindia.com
URL: www.sitar.org.in